| > عضو هيأت علمي > علي افضلي كوشا |  | | سطح علمي: | استاد | | دکترا: | Electrical Engineering, University of Michigan, Ann Arbor, U.S.A., 1994 | | کارشناسي ارشد: | Electrical Engineering, University of Pittsburgh, Pittsburgh, U.S.A., 1991 | | کارشناسي: | Electrical Engineering, Sharif University of Technology, Tehran, Iran, 1988 | | |
| > Research Interests | | Low-Power Integrated Circuits | | Low-Power Digital systems | | Reconfigurable Computing | | Nanoelectronics and Nanotechnology | | Advanced Semiconductor Modeling | | Optoelectronic Device Modeling | | Substrate Coupling | | Information Systems | | Laser Tissue Interaction |
| | > Current Research Area | | Low-Power Network on Chip/System on Chip | | Low-Power Circuits and Systems | | SOI MOSFET/MESFET Modeling |
| | > Graduate Courses Taught | | Nanodevices and Their Integration | | Advanced Semiconductor Devices | | Low-Power Digital Integrated Circuits | | Optoelectronics | | Lasers and its Biomedical Engineering Applications |
| | > Selected Publication | | D.Sharjerdi, B.Hekmatshoar, A.Khakifirooz, and A.Afzali-Kusha,"Optimization of the VT-Control Method for Low-Power Ultra-Thin Double-Gate SOL Logic Circuits," The VLSI Journal of Integration, Vol.38, issue3, January 2005, pp.505-513. | | S.H.Rasouli, A.Khademzadeh, A.Afzali-Kusha, and M.Nourani"Low-Power single and double edge-triggered flip-flops for high speed applications",IEE Proceedings-Circuits, Devices and Systems, Vol.152, No.2, pp.118-122, April 2005. | | B.Afzali, A.Zahabi, A.Amirabadi, Y.Koolivand, A.Afzali-Kusha, and M.El Nokali,"Analytical Model for C-V Characteristic of Fully-Depleted SOL-MOS Capacitors",Solid-State Electronics,Vol.49, No.8,pp.1262-1273,August,2005. | | S.Sharifi, J.Jaffari, A.Hosseinabadi, A.Afzali-Kusha,and Z.Navabi,"Simultaneous Reduction of Dynamic and static Power in Scan Structures",in proceeding of the 15th Design, Automation and Test in Europe,7-11 March, Munich, Germany,2005,pp.846-851. | | M.Saneei, A.Afzali-Kusha, and Z.Navabi,"Sign Bit Encoding For Low Power Applications", in proceeding of 1th Design Automation Conference, Anaheim, U.S.A.,June2005,pp.213-217. |
| > Low-Power High-Performance Laboratory  | | | > Nanoelectronics Center of Excellence | | | > Current Positions: | | Head of Nanoelectronics Center of Excellence; Director Low-Power High-Performance Nanosystems Laboratory; Head of Electronics Division |
| | > Senior Member of IEEE
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