Morteza Gholipour Gashniani

 

 

 

Advisor:

Dr. Ali Afzali-Kusha

Thesis Topic:

Analysis and Comparison of Asynchronous Pipeline Design Methods

Summary of research:

The continuing trend towards portable, low-power and high-speed systems made designers to use asynchronous circuits instead of synchronous approaches. Micropipelines (Asynchronous Pipelines) belong to an important asynchronous circuits, which employ advantages of asynchronous design style and benefits of pipelining. There are several micropipeline design approaches introduced in the literature, each have its own advantages and disadvantages in terms of power, latency, throughput and chip area. Selecting one type for a design is an important consideration that should be performed based on the system requirements. In the research, several micropipeline approaches are studied. Then four recently proposed ones are analyzed and simulated with HSPICE under equal conditions and their parameters are extracted and compared. Using the results of this study, one can choose the best architecture that can fit a specific requirement.
 

Education History:

  • 2000–Present, M.Sc. Student in Electronics Engineering, University of Tehran, Tehran, Iran. 

  • 1996–2000, B.Sc. in Electronics Engineering, Ferdowsi University of Mashhad, Mashhad, Iran. 

  • 1996, Diploma in Math and Physics, Shahid Bahonar high School, Tonekabon, Iran.

 

Work Experience:

  • Dec. 2001–Present, Iran Telecommunication Research Center (ITRC), Tehran, Iran

Publications:

  1. M. Fathipour and M. Gholipour, “Electronic Circuit Simulation with Star-Hspice”, ISBN: 964-94223-0-7.

  2. M. Gholipour, A. Afzali-Kusha, M. Nourani and A. Khademzadeh, “A Comparison of Asynchronous Pipeline Design Methods”, Submitted to IEE.

  3. M. Gholipour, A. Afzali-Kusha and A. Khademzadeh, “Asynchronous Pipeline Design Methods: an Analysis and Comparison”, Submitted to ASYNC’2003.

  4. M. Gholipour, A. Afzali-Kusha and A. Khademzadeh, “An Investigation of Asynchronous Pipeline Design Methods”, Submitted to IEEE ISCAS’2003.

  5. M. Gholipour, A. Afzali-Kusha, M. Nourani and A. Khademzadeh, “A Low-Power and Efficient Asynchronous Pipeline FIFO”, Submitted to IEE.

  6. M. Gholipour, A. Afzali-Kusha, M. Nourani and A. Khademzadeh, “An Efficient Asynchronous Pipeline FIFO for Low-Power Applications”, 45th IEEE MWSCAS Conf., August 2002, Tulsa, Oklahoma.

Research Interests:

  • Low-Power asynchronous circuits

  • High-performance micropipeline designs

Contact Info.

Send me E-mail to:

m_gholipour_g@yahoo.com

gholipur@itrc.ac.ir